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Micron MT29F4G08ABADAH4-IT:D Datesheet

The Micron MT29F4G08ABADAH4-IT:D is a high-performance, asynchronous NAND Flash memory device built on Single-Level Cell (SLC) technology and compliant with the Open NAND Flash Interface (ONFI) 1.0 standard. Available in densities of 4Gb, 8Gb, and 16Gb, the device organizes memory into pages (2,112 bytes for x8; 1,056 words for x16) and blocks (64 pages per block). It supports advanced command sets including page cache programming, two-plane operations, and interleaved die (LUN) operations for enhanced throughput. Key asynchronous timing features include an RC/WC of 20ns (3.3V) or 25ns (1.8V), a typical page read time of 25µs, a typical page program time of 200µs, and a typical block erase time of 700µs. The device offers robust reliability with 100,000 PROGRAM/ERASE cycles and 10 years of data retention. It operates within a Vcc range of 2.7–3.6V or 1.7–1.95V and is qualified for industrial temperature ranges (-40°C to +85°C), with additional automotive-grade options. The “IT” designa

Features:

· Open NAND Flash Interface (ONFI) 1.0-compliant1

- Single-level cell (SLC) technology

- Page size x8: 2112 bytes (2048 + 64 bytes)

- Page size x16: 1056 words (1024 + 32 words)

- Block size: 64 pages (128K + 4K bytes)

- Plane size: 2 planes x 2048 blocks per plane

- Device size: 4Gb: 4096 blocks; 8Gb: 8192 blocks

- 16Gb: 16,384 blocks

· Asynchronous I/O performance

- RC/WC:20ns (3.3V),25ns (1.8V)

- Array performance

- Read page: 25us 3

- Program page: 200us (TYP: 1.8V, 3.3V)3

- Erase block: 700us (TYP)

- Command set: ONFI NAND Flash Protocol

- Advanced command set

- Program page cache mode4

- Read page cache mode 4

- One-time programmable (OTP) mode

- Two-plane commands 4

- Interleaved die (LUN) operations

- Read unique IDBlocklock (1.8V only)

- Internal data move

Operation status byte provides software method fordetecting

- Operation completion

- Pass/fail condition

- Write-protect status

Ready/Busy# (R/B#) signal provides a hardware method of detecting operation completion

WP# signal: Write protect entire device

First block (block address 00h) is valid when ship-ped from factory with ECC. For minimum requiredECC, see Error Management.

Block 0 requires 1-bit ECC if PROGRAM/ERASE cycles are less than 1000

RESET (FFh) required as first command after power-on

Alternate method of device initialization (Nand_In-it) after power up (contact factory)

Internal data move operations supported within the plane from which data is read

Quality and reliability

- Data retention: 10 years

- Endurance: 100,000 PROGRAM/ERASE cycles

 Operating voltage range

- Vcc:2.7-3.6V

- Vcc:1.7-1.95V

Operating temperature:

- Commercial: 0°C to +70°C

- Industrial (IT):-40°C to +85°C

- Automotive Industrial (AIT): -40°C to +85°C

- Automotive (AAT): -40°C to +105°C

Package

- 48-pin TSOP type 1, CPL2

- 63-ballVFBGA


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